Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!utgpu!water!watmath!clyde!rutgers!uwvax!astroatc!johnw From: johnw@astroatc.UUCP Newsgroups: comp.arch Subject: Re: 32-bit CPUs ( NEC V70 ) and silly examples (and compilers) Message-ID: <301@astroatc.UUCP> Date: Tue, 26-May-87 15:00:13 EDT Article-I.D.: astroatc.301 Posted: Tue May 26 15:00:13 1987 Date-Received: Thu, 28-May-87 00:58:53 EDT References: <3810030@nucsrl.UUCP> <491@necis.UUCP> <3530@spool.WISC.EDU> <1526@drivax.UUCP> <166@auvax.UUCP> <3962@cae780.TEK.COM> Reply-To: johnw@astroatc.UUCP (John F. Wardale) Distribution: na Organization: Astronautics Technology Cntr, Madison, WI Lines: 64 Keywords: V60, V70, not so silly examples COMPILERS Summary: extra levels of a->b : NOT ALWAYS In article <3962@cae780.TEK.COM> daniels@cae780.UUCP (Scott Daniels) writes: >In article <166@auvax.UUCP> rwa@auvax.UUCP (Ross Alexander) writes: > [ discussion about the frequency of a->b->c->d ] >One thing that is being overlooked here is the layers of effective "p->f" >which are not in the source code. Typically each procedure has a "frame >pointer" which points to its argument and local variables area. This means >that code like: > prog(ptr) struct some_type *ptr; > { > ptr->field->link_field = 0; > } >translates to: > frame_ptr->arg_offset_ptr->field->link_field = 0; > >The problem is worse when you consider languages like Algol and Pascal >Which provide definitions of functions inside functions and allow up-level These question all depend heavily on the machine architecture *AND* on the compiler implementation! To generalize: All compiler implementors will make a maximum effort to keep the frame pointer in a register (ie on anything short of mem-mem or accumulator only reg machine). For languages like pascal, it is COMMON to use "displays" which means that a register is used for the `frame pointer' of each staticly nested function or procedure. (Thus all accesses are at worst: reg->variable (in C notation).) For any language where the compiler can COUNT the arguments [YES] or the local vars [probably] (but NOT necessarily both) it is possible to reference both from a signle pointer-reg. (this assumes a signed index) If this doesn't work, then you can have 2 pointer-reg's (one for agrs, one for locals) This *SEEMS* to indicate that an addressing mode for "MEM [reg+const]" is worth having (hopefully with a one cycle operand fetch). Of course one must PROVE this with simulation (or some such) results! As for the multiple indirects and other addressing modes, there appears to be little gain there, especially in light of overlapping loads. I vote for simpler and faster! Also note that even the NEC chip had to generate multiple instructions for multiple -> operators! Another argument in favor of RISCy machines and GOOD code schedulers: we got a 2:1 improvement by "tuning" our code scheduler....maybe I should say "fixing" instead of "tuning" (No, both were run *WITHOUT* the optimizer!) John W - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Name: John F. Wardale UUCP: ... {seismo | harvard | ihnp4} !uwvax!astroatc!johnw arpa: astroatc!johnw@rsch.wisc.edu snail: 5800 Cottage Gr. Rd. ;;; Madison WI 53716 audio: 608-221-9001 eXt 110 To err is human, to really foul up world news requires the net!