Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.1 6/24/83; site turtlevax.UUCP Path: utzoo!linus!decvax!decwrl!turtlevax!ken From: ken@turtlevax.UUCP (Ken Turkowski) Newsgroups: net.micro.68k,net.arch,net.lang Subject: Inconsistent bit addressing in the 68020: big- AND little-endian Message-ID: <491@turtlevax.UUCP> Date: Wed, 22-Aug-84 18:59:21 EDT Article-I.D.: turtleva.491 Posted: Wed Aug 22 18:59:21 1984 Date-Received: Thu, 23-Aug-84 07:38:20 EDT Distribution: net Organization: CADLINC, Palo Alto, CA Lines: 17 A brief look at the 68020 instruction documentation shows that it has two different types of bit addressing for different instructions. The bit test, set, clear, etc. instructions address bits within a word in a little-endian manner, i.e. bit 0 is in the least significant position, bit 31 in the most significant. The bit field instructions, on the other hand, address bits (across and within words) in a big-endian manner, i.e. bit 0 is in the most significant position, bit 31 in the least. This proves that it is impossible to make a consistent big-endian machine! :-) -- Ken Turkowski @ CADLINC, Palo Alto, CA UUCP: {amd,decwrl,dual,flairvax,nsc}!turtlevax!ken ARPA: turtlevax!ken@DECWRL.ARPA