Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!linus!decvax!harpo!ihnp4!inuxc!pur-ee!uiucdcs!miller From: miller@uiucdcs.UUCP (miller ) Newsgroups: net.micro.cbm Subject: Re: Re: c64 floating point, part 3 - (nf) Message-ID: <5652@uiucdcs.UUCP> Date: Wed, 15-Feb-84 03:27:12 EST Article-I.D.: uiucdcs.5652 Posted: Wed Feb 15 03:27:12 1984 Date-Received: Thu, 16-Feb-84 06:04:52 EST Lines: 41 #R:genrad:-381600:uiucdcs:36100043:000:1123 uiucdcs!miller Feb 14 23:10:00 1984 Sorry, but I if I've done this correctly, I have to differ with you on the addresses for the c64 floating point routines. You claimed that two of the addresses I gave in part 3 of my series were incorrect, i.e., "F1 to memory" and "F1 to F2". I have copied one of the routines below so that you can verify it works. The comments are of course mine, but the rest comes straight from my disassembler. ; F1 to F2 subroutine ; ORG $BC0F ;where I started disassembling LDX# 6 ;six bytes to copy LDA 96,X ;F1 (97-102) STA 104,X ;F2 (105-110) DEX BNE *-5 ;done? STX 112 RTS The other routine begins: ; F1 to memory ; ORG $BBD7 STX 34 ;save MSB memory location STY 35 ;save LSB . . . If you jump to the locations you suggested ($BC0C and $BBD4) rather than the ones I gave in my four part series, then in both cases you will first execute a JSR $BC1B which is an internal round off F1 subroutine. After the RTS you will wind up right back where I suggested you branch to in the first place. A. Ray Miller Univ Illinois